A complete example

One job, start to finish.

Everything CaseBrick turns a single posting into — the tailored questions, one answer coached out loud, the delivery read, and a readiness number. One example, every step, nothing cut.

This walkthrough uses a real NVIDIA posting. The questions, coached answer, and scores are illustrative of CaseBrick's output — your prep is generated from your posting and résumé, so yours will read differently.
01The input

Paste the job.

One posting in. Optionally your résumé, so questions target the gap between what the role wants and what you've done.

pasted from nvidia.com/careers

Senior Deep Learning Software Engineer, TensorRT

NVIDIA · AI Inference (TensorRT / TensorRT-LLM) · Santa Clara, CA or US Remote · onsite loop

Build and optimize the software that runs the world's largest models in production. Day to day, you will:

  • Design and optimize TensorRT and TensorRT-LLM to accelerate inference for state-of-the-art LLMs and generative-AI models
  • Write performance-critical software in C++, Python, and CUDA across NVIDIA's inference stack
  • Implement graph-compiler passes, frontend operators, and code generators
  • Contribute features to OSS frameworks (PyTorch, TensorRT-LLM) and collaborate with the deep-learning community
  • Profile and tune GPU kernels for latency, throughput, and memory bandwidth
  • Partner across generative AI, automotive, robotics, speech, and vision teams

What we need to see: 4+ yrs performance software · expert C++/Python · a DL framework (PyTorch, JAX, or TensorFlow) · GPU architecture & CUDA (or Triton, CUTLASS) · Linux, Docker.

Ways to stand out: LLM-inference optimization (quantization, KV-cache, paged attention, speculative decoding) · compiler/MLIR background · OSS contributions.

Base range $184,000–$339,250 USD · equity · full benefits

résumé attached — read on your device to pull out the text
02What comes back

The questions this role is likely to ask.

CaseBrick reads what the posting actually screens for and writes the set — behavioral and role-specific, targeted to your gaps, not a generic bank.

Walk me through how you'd cut the latency of an LLM inference server that's GPU-bound. How do you tell whether you're compute-bound or memory-bandwidth-bound?
Systems · onsite
You want to quantize a model to FP8 for a latency-sensitive deployment. What breaks, and how do you catch a quality regression before it ships?
ML depth
Describe the hardest CUDA kernel you've written or debugged. What made it hard, and how did you validate both correctness and speedup?
GPU · coding
A PyTorch team depends on a TensorRT operator you own. They need a breaking change to hit their release. How do you handle it?
Cross-functional
Tell me about an optimization that looked great in a benchmark but didn't hold in production. What did the profiler miss?
Judgment
Design the serving path for a 70B-parameter model across 8 GPUs. How do you split it, and where are the bottlenecks?
Systems design

Generated from common public patterns for this role and level — not real or leaked questions, and CaseBrick tells you so.

Your gaps vs. the posting
Strong PyTorch and training on your résumé — but no CUDA kernel or TensorRT work. Prep one systems-level optimization story.
You've shipped model accuracy, not inference infra — be ready to talk latency and throughput trade-offs, not just eval metrics.
An opener you can use

“I've spent four years getting models into production — the last two obsessing over inference latency, not just accuracy. I haven't shipped a custom TensorRT kernel, but I've profiled and cut real GPU serving costs, and I go deep fast.”

03One answer, all the way

Rehearse it out loud. Get it scored.

You answer out loud. CaseBrick scores what you said against a structured-interview rubric and how you sounded on six delivery signals — then hands you the single fix that moves the needle most.

Q1Walk me through how you'd cut the latency of a GPU-bound LLM inference server.
Your answer · transcript

Um, first thing — I profile before I touch anything. I'd run Nsight Systems to see whether I'm compute-bound or memory-bandwidth-bound, because the fix is completely different. For LLM decode you're usually bandwidth-bound moving the KV cache, so I'd batch more requests to amortize the weight loads, then, like, reach for FP8 quantization to shrink what I'm actually moving. If attention is the bottleneck I'd swap the naive kernel for a fused, FlashAttention-style one. And I'd hold every change to a fixed latency budget and watch quality on a held-out set, so a speedup doesn't quietly regress accuracy.

82/100
Content. Strong instinct — profile first, and you named the real bottleneck (bandwidth-bound decode, the KV cache). To crack 90: quantify it ("p99 from 240ms to 90ms") and name the trade-off you rejected, and why.
Delivery · six signals
Pace71
Pauses78
Steadiness66
Clarity84
Energy70
Depth86
Your one fix

Two hedges ("um," "like") early cost you steadiness — costly in a systems interview, where they read your first sentence for conviction. Open on the profiler result, not "um, first thing." A decisive opener reads as senior.

04Readiness

Do a few reps. Watch it move.

Every rehearsed answer updates one readiness number for this role — it climbs as you sharpen, and it can dip if you add a harder round or leave an answer weak. It's honest, not a vanity meter.

79

Interview-ready

Started at 44 after one rep → 79 after six. One systems answer still flagged to sharpen.

A practice estimate — it doesn't predict or guarantee your interview result.

How the scores are built and what they can't tell you: Delivery Engine · Signal Layer.

Now run your job.

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